Pin Freeze File:  version M1.5.25

;If you have made significant changes to your 7300 design and have trouble
;recreating the same pinout try disabling the FREEZE_OPTIMIZATION option.

;Removing the semicolon on the FREEZE_OPTIMIZATION line below disables this
;option.  FREEZE_OPTIMIZATION=OFF tells the optimization software to
;take account of the pin-assignments (e.g., apply different collapsing
;rules to logic assigned to fast-function blocks).
;Do NOT use this option when targeting a 9500 device.
;FREEZE_OPTIMIZATION: OFF
95216160 XC95216-15-PQ160
clk7d5 S:PIN33
ecp_mode S:PIN79
fset S:PIN77
host_ack S:PIN63
host_clk S:PIN57
initialize S:PIN159
int_strobe S:PIN35
ir0 S:PIN144
ir1 S:PIN98
ir2 S:PIN134
md0 S:PIN97
md10 S:PIN102
md11 S:PIN117
md1 S:PIN146
md2 S:PIN17
md3 S:PIN152
md4 S:PIN92
md5 S:PIN143
md6 S:PIN142
md7 S:PIN44
md8 S:PIN95
md9 S:PIN148
omni_d S:PIN138
omni_e S:PIN37
omni_f S:PIN122
pause S:PIN90
rev_req S:PIN88
run S:PIN60
tp1 S:PIN86
tp3 S:PIN42
tp4 S:PIN64
ts1 S:PIN24
ts2 S:PIN59
ts3 S:PIN104
ts4 S:PIN115
user_mode S:PIN139
ema0 S:PIN154
ema1 S:PIN155
ema2 S:PIN156
ma0 S:PIN18
ma10 S:PIN19
ma11 S:PIN21
ma1 S:PIN22
ma2 S:PIN23
ma3 S:PIN30
ma4 S:PIN25
ma5 S:PIN26
ma6 S:PIN140
ma7 S:PIN27
ma8 S:PIN28
ma9 S:PIN29
omni_data0 S:PIN9
omni_data10 S:PIN47
omni_data11 S:PIN48
omni_data1 S:PIN49
omni_data2 S:PIN50
omni_data3 S:PIN52
omni_data4 S:PIN53
omni_data5 S:PIN11
omni_data6 S:PIN12
omni_data7 S:PIN13
omni_data8 S:PIN14
omni_data9 S:PIN54
pdata0 S:PIN32
pdata1 S:PIN36
pdata2 S:PIN58
pdata3 S:PIN62
pdata4 S:PIN38
pdata5 S:PIN45
pdata6 S:PIN5
pdata7 S:PIN153
ack_rev S:PIN113
bk_cycle S:PIN76
bk_data_cont S:PIN129
bk_in_prog S:PIN87
break_prio S:PIN82
cpma_disable S:PIN89
dummy1 S:PIN125
dummy2 S:PIN147
ind1 S:PIN101
ind2 S:PIN103
init_out S:PIN131
key_cntrl S:PIN106
load_addr S:PIN133
load_addr_en S:PIN135
ma_in S:PIN116
ma_ms_load S:PIN72
md_dir S:PIN84
mem_start S:PIN126
ms_ir_dis S:PIN108
omni_data_in S:PIN145
omni_data_out S:PIN149
our_addr S:PIN15
our_break S:PIN78
periph_ack S:PIN7
periph_clk S:PIN65
periph_req S:PIN93
rev_req_cnt0 S:PIN119
rev_req_cnt1 S:PIN124
rev_req_sync S:PIN96
stop S:PIN91
sw_sw S:PIN16
test_reg0 S:PIN43
test_reg1 S:PIN55
test_reg2 S:PIN68
test_reg3 S:PIN56
test_reg4 S:PIN158
test_reg5 S:PIN2
test_reg6 S:PIN3
test_reg7 S:PIN4
xflag S:PIN111


;The remaining section of the .gyd file is for documentation purposes only.
;It shows where your internal equations were placed in the last successful fit.

PARTITION FB1_2 ma0 ma10
PARTITION FB1_5 ma11 ma1
PARTITION FB1_8 ma2
PARTITION FB1_10 sw_halt_Q ma4 ma5 byte_cnt1_Q ma7 ma8 ma9 ma3
                    byte_cnt0_Q

PARTITION FB2_2 EXP0_ periph_ack EXP1_
PARTITION FB2_6 omni_data0
PARTITION FB2_8 omni_data5 omni_data6
PARTITION FB2_11 omni_data7 omni_data8
PARTITION FB2_14 our_addr sw_sw sw_momentary1_Q sw_momentary0_Q
                    data_mode_Q

PARTITION FB3_1 EXP2_ pdata0 EXP3_
PARTITION FB3_7 EXP4_ pdata1 EXP5_ EXP6_ pdata4
PARTITION FB3_15 test_reg0
PARTITION FB3_17 host_clk_d2_Q sw_rotary0_Q

PARTITION FB4_2 EXP7_ pdata7
PARTITION FB4_5 ema0 ema1
PARTITION FB4_8 ema2 test_reg4
PARTITION FB4_12 test_reg5
PARTITION FB4_14 test_reg6 test_reg7 sw_step_Q pdata6 sw_momentary2_Q

PARTITION FB5_1 EXP8_ pdata5 omni_data10
PARTITION FB5_5 omni_data11 omni_data1
PARTITION FB5_8 omni_data2 omni_data3
PARTITION FB5_11 omni_data4 omni_data9
PARTITION FB5_14 test_reg1 test_reg3
PARTITION FB5_17 sw_rotary2_Q sw_rotary1_Q

PARTITION FB6_2 ma6
PARTITION FB6_6 ma_inc_Q break_done_Q omni_data_in
                    "bk_active_Q/bk_active_Q_RSTF__$INT"
                    write_break_pending_Q dummy2
                    "sw_data8_Q/sw_data8_Q_TRST" our_break_tp1_Q
                    omni_data_out our_break_del_Q
                    read_break_pending_Q need_break_Q led_clk_Q

PARTITION FB7_1 EXP9_ pdata2 EXP10_
PARTITION FB7_5 EXP11_ pdata3 EXP12_
PARTITION FB7_11 periph_clk
PARTITION FB7_15 test_reg2
PARTITION FB7_18 sw_start_Q

PARTITION FB8_2 mem_start
PARTITION FB8_5 bk_data_cont
PARTITION FB8_7 par_rx_rising_Q init_out dbk_data5_Q sw_start_d1_Q
                    load_addr latch_led9_Q host_clk_cnt1_Q
                    load_addr_en host_clk_cnt0_Q sw_pulse_Q
                    "latch_led8_Q/latch_led8_Q_SETF"
                    "latch_led5_Q/latch_led5_Q_SETF"

PARTITION FB9_2 ma_ms_load latch_led8_Q latch_led7_Q bk_cycle
                    latch_led6_Q latch_led5_Q our_break latch_led4_Q
                    latch_led0_Q break_prio
                    "latch_led6_Q/latch_led6_Q_SETF"
                    "latch_led2_Q/latch_led2_Q_SETF" md_dir
                    "latch_led1_Q/latch_led1_Q_SETF"
                    "latch_led11_Q/latch_led11_Q_SETF"
                    "latch_led10_Q/latch_led10_Q_SETF"
                    "latch_led0_Q/latch_led0_Q_SETF"

PARTITION FB10_2 ack_rev
PARTITION FB10_4 "sw_pulse_Q/sw_pulse_Q_RSTF__$INT"
                    "mem_start_reg_Q/mem_start_reg_Q_RSTF__$INT"
                    ma_in reg_num2_Q reg_num1_Q reg_num0_Q
                    delay_cnt2_Q rev_req_cnt0 delay_cnt0_Q
                    "$OpTx$INV$215__$INT" host_clk_d1_Q rev_req_cnt1
                    delay_cnt1_Q dummy1 mem_start_reg_Q

PARTITION FB11_2 bk_in_prog
PARTITION FB11_4 dbk_data9_Q cpma_disable dbk_data8_Q dbk_data7_Q
                    stop dbk_data6_Q dbk_data4_Q periph_req
                    dbk_data3_Q dbk_data2_Q rev_req_sync dbk_data1_Q
                    dbk_data11_Q dbk_data10_Q dbk_data0_Q

PARTITION FB12_2 ind1
PARTITION FB12_5 ind2 latch_led3_Q latch_led2_Q latch_led1_Q
                    key_cntrl latch_led11_Q latch_led10_Q ms_ir_dis
                    sr_to_data "latch_led9_Q/latch_led9_Q_SETF" xflag
                    "latch_led7_Q/latch_led7_Q_SETF"
                    "latch_led4_Q/latch_led4_Q_SETF"
                    "latch_led3_Q/latch_led3_Q_SETF"