Pin Freeze File:  version M1.4.12

;If you have made significant changes to your 7300 design and have trouble
;recreating the same pinout try disabling the FREEZE_OPTIMIZATION option.

;Removing the semicolon on the FREEZE_OPTIMIZATION line below disables this
;option.  FREEZE_OPTIMIZATION=OFF tells the optimization software to
;take account of the pin-assignments (e.g., apply different collapsing
;rules to logic assigned to fast-function blocks).
;Do NOT use this option when targeting a 9500 device.
;FREEZE_OPTIMIZATION: OFF
957284 XC9572-15-PC84
clk7d5 S:PIN9
ecp_mode S:PIN44
host_ack S:PIN17
host_clk S:PIN53
rev_req S:PIN33
pdata0 S:PIN32
pdata1 S:PIN63
pdata2 S:PIN68
pdata3 S:PIN71
pdata4 S:PIN72
pdata5 S:PIN79
pdata6 S:PIN83
pdata7 S:PIN84
relay0 S:PIN4
relay1 S:PIN7
relay2 S:PIN11
relay3 S:PIN35
relay4 S:PIN61
relay5 S:PIN18
relay6 S:PIN23
relay7 S:PIN40
ack_rev S:PIN25
our_addr S:PIN67
periph_ack S:PIN51
periph_clk S:PIN55
periph_req S:PIN43
rev_req_cnt0 S:PIN46
rev_req_cnt1 S:PIN6
rev_req_sync S:PIN13
xflag S:PIN45


;The remaining section of the .gyd file is for documentation purposes only.
;It shows where your internal equations were placed in the last successful fit.

PARTITION FB1_1 relay0
PARTITION FB1_3 rev_req_cnt1 relay1
PARTITION FB1_7 relay2
PARTITION FB1_10 rev_req_sync
PARTITION FB1_12 relay5
PARTITION FB1_16 relay6

PARTITION FB2_1 pdata1
PARTITION FB2_3 our_addr pdata2
PARTITION FB2_6 pdata3
PARTITION FB2_8 pdata4
PARTITION FB2_12 pdata5
PARTITION FB2_15 pdata6
PARTITION FB2_17 pdata7

PARTITION FB3_1 ack_rev
PARTITION FB3_4 pdata0
PARTITION FB3_7 relay3
PARTITION FB3_10 relay7
PARTITION FB3_13 periph_req
PARTITION FB3_16 xflag

PARTITION FB4_1 rev_req_cnt0
PARTITION FB4_3 periph_ack
PARTITION FB4_6 par_rx_rising_Q periph_clk host_clk_d2_Q reg_num2_Q
                    reg_num1_Q reg_num0_Q host_clk_d1_Q relay4
                    data_mode_Q byte_cnt1_Q byte_cnt0_Q
                    host_clk_cnt1_Q host_clk_cnt0_Q