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^3M;I7IWM3MN 3O[N7IWG7RSA3I;O")*M*-6-*-6-*-6-*-6-*-6-*-6-*-6-*-6-*-6-*-6-*-6-*-6-*-6-*-6-*-6-*-6-*-6-*-6-*-6-*-6-*-6-*-6-*-6-"-6-"J*M3DOEX	C"I&I2IWD7C"/28N 7USS3O	M3ZSEC^BJBMB ? ?APHDAB PH7DZ 7EOR3I;O")*M*M*J3D3I3AOB*I6I*0683D3I+A7BC&I/LOA262//AV32 WT3R	M
N3A2 WTS7T2JR*7ICLA	C.IB-28R-7ICL3AN-2I2I+E>8/LCP282 3IWN6 KP7ISN+ECR7TOET*M2*	D3LWPB&I.-"02-	D3LWP"-	B6ICL*0>8/LCP252 3IWN6 KP7ISN+ECR7TOET*M*M*J3D3H3SOABCC REG NOT CLEARED BY INITAC NOT CLEARED BY RCRLAC NOT CLEARED BY RCRHAC NOT CLEARED BY RCGB
^SET IOT CODE IN SR, PRESS CONTINUE
^
^SET BIT 11 FOR PARITY,0=EVEN, 1=ODD, PRESS CONTINUE
^
^SET SR FOR RUN, PRESS CONTINUE
^AC NOT CLEARED BY RCTVVRC ERROR, AC04=P BITVRC ERROR, AC11=P BITVRC ERROR, EVEN PAR DETVRC ERROR, ODD PAR DETCRC 12 ERRORCRC 16 ERRORBCC 6 BIT LOAD ERRORBCC 7 BIT LOAD ERRORBCC 8 BIT LOAD ERRORBCC 12 BIT LOAD ERRORBCC 16 BIT LOAD ERROR
^LOW  HIGH
^DATA REC
^ORIG  SIM   ACT
^CHAR TRANS
^TRANSMITTED SIMULATED   RECEIVED
^TRANS REC
^TRANSMITTED RECEIVED
^SINGLE CYCLE BCC 12 RESULTS
^ORIG  SHIFT SIM   ACT
^SINGLE CYCLE BCC 16 RESULTS
^ORIGINAL    SHIFT SIMULATED   RECEIVEDB)=WX>8XBHV	B?&4C?%8??PCP:	?*I"/C>> .*U"W*UR%A((J%	=	<"/C>> 	;R.J&> *
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P	7/P	7.GDHKGA-B STOPPED AT   PC:  AC:  MQ:  FL:????????FILES COPIED:00K/00K COREDAY  NOT ENOUGH CORECANNOT CHANGE COR,T<B,].E)A.X(/DMIN.=AN UNEXPECTED INTERRUPT OCCURED--OTHER THAN THE LS8AN UNWANTED INTERRUPT OCCUREDWEDGE PATTERN PRINT TESTCHARACTER PRI
T TEST"OVER-PRINT" TESTSELECT A "PROCESSOR SELECTION SWITCH" IN SWITCHES 05 THRU 06SWIRL PRINT PATTERN TESTSPACE TESTNO

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