File RESET1.PA (PAL assembler source file)

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/    13.8.71   JG
/BIT PATTERN IN DP SHIFT REGISTER COMPARED WITH MASK


IRESET, 0
        CLA
        TAD I IRESET/   INIT STATE
        ISZ IRESET
        DCA LSTAT1
        DCA I LSTAT1
        ISZ LSTAT1
        DCA I LSTAT1

        TAD MASKLO/  INIT MASK
        AND NMSKLO/  DETERMINE LENGTH OF PATTERN
        CIA
        DCA INVMLO

        TAD MASKHI
        AND NMSKHI
        CIA
        DCA INVMHI

        JMS I IRESET



RESET,  0
        DCA SAVBIT

        TAD I RESET/   GET STATE ADDRESS  1=LOW
        ISZ RESET
        DCA LSTAT1
        TAD LSTAT1
        IAC
        DCA LSTAT2

        TAD I LSTAT1/   SHIFT REG LOW END
        MQL
        TAD I LSTAT2
        SHL
        1
        DCA I LSTAT2
        MQA
        TAD SAVBIT/    UPDATE
        DCA I LSTAT1

        TAD I LSTAT1/   COMPARE LOW END
        AND NMSKLO/    DETERMINE LENGTH OF PATTERN
        TAD INVMLO
        SZA CLA
        JMP NOTFND

        TAD I LSTAT2
        AND NMSKHI
        TAD INVMHI
        SZA CLA
        JMP NOTFND

        JMP DO



        DCA FLAG
NOTFND, TAD SAVBIT
        JMP I RESET



DO,     IAC
        DCA FLAG
        TAD SAVBIT
        JMP I RESET



MASKLO, 0421
MASKHI, 0421
NMSKLO, 7777
NMSKHI, 0
LSTAT1, 0
LSTAT2, 0
INVMLO, 0
INVMHI, 0
SAVBIT, 0
FLAG,   0
$$$$$$$$$$$

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