This is the G619A core memory board from the MM8-E memory option. It stores 4k 12 bit words. It required the G104 Sense/Inhibit (152K) and G227 X/Y driver (156K) boards to operate. The memory cores are in the middle. Each column of the core plane is 3 bits of the 12 bit word, with each vertical pair of dense core strips storing one bit by 4096 locations. To reduce noise the 4096x1 core plane was split in two pieces with the sense/inhibit wire crossing between the core columns. This acts like a twisted pair wire so the read noise on the sense line becomes common mode and is rejected by the differential sense amplifier. The crossover can be seen in Core mat for a single bit (149K)
The board has 49152 cores each taking about .0148x.025 inches with the ferrite toroid .022x.007. The wires appear to be about .003 inch diameter, 40 gauge. Three of these wires run through each toroid. The twisted bundles of wires are the sense/inhibit line, the rest are the X and Y lines. At the center top is the thermistor used to compensate the X and Y currents with temperature.
Feel free to contact me, David Gesswein firstname.lastname@example.org with any questions, comments on the web site, or if you have related equipment, documentation, software etc. you are willing to part with. I am interested in anything PDP-8 related, computers, peripherals used with them, DEC or third party, or documentation.
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